ARM Cortex-A57

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ARM Cortex-A57
Designed by ARM Holdings
Microarchitecture ARMv8-A
Cores 1–4 per cluster, multiple clusters[1]
L1 cache 80 KiB (48 KiB I-cache with parity, 32 KiB D-cache with ECC) per core
L2 cache 512 KiB to 2 MiB
L3 cache none

The ARM Cortex-A57 is a microarchitecture implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings. The Cortex-A57 is an out-of-order superscalar pipeline.[1] It is available as SIP core to licensees, and its design makes it suitable for integration with other SIP cores (e.g. GPU, display controller, DSP, image processor, etc.) into one die constituting a system on a chip (SoC).

Overview

  • Pipelined processor with deeply out of order, speculative issue 3-way superscalar execution pipeline
  • DSP and NEON SIMD extensions are mandatory per core
  • VFPv4 Floating Point Unit onboard (per core)
  • Hardware virtualization support
  • Thumb-2 instruction set encoding reduces the size of 32-bit programs with little impact on performance.
  • TrustZone security extensions
  • Program Trace Macrocell and CoreSight Design Kit for unobtrusive tracing of instruction execution
  • 32 KiB data (2-way set-associative) + 48 KiB instruction (3-way set-associative) L1 cache per core
  • Integrated low-latency level-2 (16-way set-associative) cache controller, 512 KB, 1 MB, or 2 MB configurable size per cluster
  • 48-entry fully associative L1 instruction Translation Lookaside Buffer (TLB) with native support for 4 KiB, 64 KiB, and 1 MB page sizes
    • 4-way set-associative of 1024-entry L2 TLB
  • 2-level dynamic predictor with Branch Target Buffer (BTB) for fast target generation
  • Static branch predictor
  • Indirect predictor
  • Return stack

Chips

In January 2014, AMD announced the Opteron A1100. Intended for servers, the A1100 has 4 or 8 Cortex-A57 cores, support for up to 128 GiB of DDR3 or DDR4 RAM, an 8-lane PCIe controller, 8 SATA (6 Gbit/s) ports, and two 10GigE ports.[2]

Qualcomm's first offering which was made available for sampling Q4 2014 was the Snapdragon 810.[3][4] It contains 4xCortex-A57 + 4xCortex-A53 cores in a big.LITTLE configuration.

Samsung also provides Cortex-A57-based SOC's, the first one being Exynos Octa 5433 which was available for sampling from Q4 2014.

See also

References

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  4. Snapdragon 810

External links